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50MS/S High Bandwidth Software Defined Radios ETTUS USRP B210 for Communications
50MS/S High Bandwidth Software Defined Radios ETTUS USRP B210 for Communications
FOB Price
China
Main Products : USRP SDR
Room 404, Block A, Zhiyuan Building, Great Wall Innovation and Technology Park, Tangxun North Road, East Lake High-tech Zone, Wuhan Wuhan, Hubei
50MS/S High Bandwidth Software Defined Radios ETTUS USRP B210 for Communications Details
Place of Origin
China
Supply Type
OEM Service
Condition
New
50MS/S High Bandwidth Software Defined Radios ETTUS USRP B210 for Communications Introduce

Software Defined Radio,USRP-LW B210, Compatible with ETTUS USRP B210

Product Overview

The USRP-LW N210 provides high-bandwidth, high-dynamic range processing capability. The USRP-LW N210 is intended for demanding communications applications requiring this type of rapid development. The product architecture includes a Xilinx® Spartan® 3A-DSP 3400 FPGA, 100 MS/s dual ADC, 400 MS/s dual DAC and Gigabit Ethernet connectivity to stream data to and from host processors. A modular design allows the USRP N210 to operate from DC to 6 GHz, while an expansion port allows multiple USRP-LW N210 series devices to be synchronized and used in a MIMO configuration. The USRP-LW N210 can stream up to 50 MS/s to and from host applications. Users can implement custom functions in the FPGA fabric, or in the on-board 32-bit RISC softcore. The FPGA also offers the potential to process up to 100 MS/s in both the transmit and receive directions. The FPGA firmware can be reloaded through the Gigabit Ethernet interface.

The USRP-LW N210 is an enhanced version of the USRP N200 that includes a larger FPGA. This allows users to move additional functionality into the FPGA, increasing the maximum processing capability up to 100 MS/s in both directions while offering potential improvements in processing latency.

Main Features:

1. Maximum transmission rate:50MS/s

2. Gigabit Ethernet connection

3. MIMO cable connection—based on only one single transceiver link per USRP-LW N210, so MIMO construction must be built by two or more USRP-LW N210s

4. Onboard FPGA processing

5.FPGA:Xilinx Spartan XC3SD3400A

6. ADCs:14 bits- 100 MS/s

7. DACs: 16 bits - 400 MS/s

8. Ability to lock an external 5 or 10 MHz reference clock

9. Optional internal GPS servo clock – USRP-LW N210 GPSDO

Schematic diagram

50MS/S High Bandwidth Software Defined Radios ETTUS USRP B210 For Communications 0

Detailed performance:

A modular design allows the USRP-LW N210 to operate from DC to 6 GHz, while an expansion port allows multiple USRP-LW N210 series devices to be synchronized and used in a MIMO configuration. An optional GPSDO module can also be used to discipline the USRP-LW N210 reference clock to within 0.01 ppm of the worldwide GPS standard. The USRP-LW N210 can stream up to 50 MS/s to and from host applications. Users can implement custom functions in the FPGA fabric, or in the on-board 32-bit RISC softcore. The USRP-LW N210 provides a larger FPGA than the USRP-LW N200 for applications demanding additional logic, memory and DSP resources. The FPGA also offers the potential to process up to 100 MS/s in both the transmit and receive directions. The FPGA firmware can be reloaded through the Gigabit Ethernet interface.

Technical Parameters:

50MS/S High Bandwidth Software Defined Radios ETTUS USRP B210 For Communications 1

Included in This Equipment:

1. USRP-LW N210

2. 2 SMA-Bulkhead Cables

3. 1 Gigabit Ethernet Cable

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