Product Overview
FBC0409 is a fieldbus interface and controller IC which conforms to IEC 61158 filedbus physical layer definition. It supports typical embedded CPU and MCU, and satisfies the demands of high performance fieldbus masters or slavers.
FBC0409 contains Manchester data encoder and decoder on chip. It requires a medium interface and external filter for connection to a fieldbus system, and can automatically correct bus polarity. FBC0409 also contains 4k bytes embedded data RAM, applying DMA controller. The implementation of message transmission and address resolution can be executed without CPU intervention. The Rx and Tx data status is available in status registers of FBC0409, such as status of line operation, code error, frame loss, frame collision.
FBC0409 implement a portion of data-link layer function. Tx/Rx frame check sequence (FCS), 16 bits 1ms timer, 16 bits 1/32ms timer, 16 bits octet time timer, frame code decoding and address resolution.
Features Supports line data rate 31.25K Bit/S Build-in Manchester Encoder/Decoder Transmitter Jibber inhibit, receiver super long frame inhibit Automatic parity recognize and correct Message type and destination address detection automatically Automatic transmitter and receiver frame check Build-in three channels DMA controller,used to control data transmitting, receiving and address recognization looking up table memory management 4k bytes asynchronous SRAM internal as communication buffer for transmitting, receiving and address lookup table memory Length of Preamble, Start and Stop delimiter under software controlled Build-in bus arbiter, CPU accessing internal SRAM correctly Data link layer timer ( 1ms,1/32 ms,octet time timer ) Designed lots of useful interrupt and status Registers Compatibility with INTEL,ARM serials CPU Internal loop back for test STANDBY feature Power supply: 2.7~5.5V Power consumption: <600uA Operating temperature range: -40°C~85°C Available in 44-pins TQFP package
Details
FBC0409 Pin Diagram
FBC0409 Interal Function Block Diagram
